In recent years, to realize smaller and thinner electronic devices with more enhanced functions and performance, high-density packaging techniques for semiconductor packages are demanded. Conventionally, a wiring board and a semiconductor element are connected to each other by wire bonding using a gold wire or the like or by flip-chip bonding using a solder ball. However, both wire bonding and flip-chip bonding have problems. While wire bonding is advantageous in cost, a wire diameter needs to be decreased to narrow a pitch, causing problems such as wire disconnection and strict connection conditions. Compared with wire bonding, flip-chip bonding enables higher-speed transmission. However, if the number of semiconductor element terminals is increased or if a narrow pitch connection is used, connection strength of solder bumps is decreased. Thus, cracks are generated at connection parts or defective connection is caused by voids.
In view of such background, as a high-density packaging technique that realizes a semiconductor device with higher integration and more enhanced functions and that provides many advantages such as thinner packaging, lower cost, high frequency management, and lower-stress connection, there has been proposed a semiconductor device including a wiring board incorporating a semiconductor element having an electrode terminal from which a wiring directly extends. Namely, a board incorporating a semiconductor element has been proposed.
Meanwhile, along with a recent increase in the speed and density of the semiconductor element, electromagnetic noise or heat generation is causing erroneous device operations and is degrading device performance. Thus, many means to solve these problems have been proposed.
Patent Document 1:
    Japanese Patent No. 3277997Patent Document 2:    Japanese Patent Kokai Publication No. JP-P2004-179227 APatent Document 3:    Japanese Patent Kokai Publication No. JP-P2007-335496 A